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Release v0.8.6
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@svc-aindscicomp svc-aindscicomp released this 11 Nov 00:56
· 41 commits to main since this release
v0.8.6
5c21349
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Learn about vigilant mode.

What's Changed

  • Implement clock output mapping from clock generator devices by @bruno-f-cruz in #121

Full Changelog: v0.8.5...v0.8.6

Contributors

bruno-f-cruz
Assets 2
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