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Aidan-McNay/README.md

πŸ’« Aidan McNay

Hi! I'm a M.Eng student at Cornell University studying Electrical and Computer Engineering
Strengths include Digital RTL design and testing, as well as automating work around me.

Feel free to reach out - always willing to learn more and get involved!

  • πŸ”­ I’m currently an incoming M.Eng student at Cornell University studying Electrical and Computer Engineering, focusing on Computer Architecture
  • 🌱 I’m currently learning Rust and Go
  • πŸ’¬ Ask me about computer engineering (from RTL to VLSI)
  • πŸ“« How to reach me: The best way is probably email
  • πŸ˜„ Pronouns: he/him
  • ⚑ Fun fact: I can juggle clubs!

🌐 Socials:

Instagram LinkedIn

πŸ’» Tech Stack:

Altium Bash C++ C LaTeX OCaml Python Qt CMake Canva Gimp Gnu Image Manipulation Program Inkscape Verilog/SystemVerilog

πŸ“Š GitHub Stats:



πŸ† GitHub Trophies

✍️ Random Dev Quote


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  1. 31b-PrimeDetection 31b-PrimeDetection Public

    Forked from TinyTapeout/tt03-submission-template

    31-bit prime number detector for Tiny Tapeout 03

    Verilog 2

  2. ECE_Graduation_Validation ECE_Graduation_Validation Public

    Validates a course schedule and ensures it follows Cornell ECE's requirements for graduation

    Python

  3. rsa-xcel rsa-xcel Public

    Hardware accelerators for RSA encryption/decryption

    Verilog

  4. jeopardy jeopardy Public

    A Jeopardy GUI for creating and running games, implemented in Go

    Go